Difference between revisions of "FRAM Model AIO"
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: This byte represents which pulse counter input had an integrity problem. When byte.BIT7 (MSB)=1 -> Pulse Counter input 15 had an integrity problem (Byte.BIT7=0 -> value is ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 8 had an integrity problem (Byte.BIT0=0 -> value is ok) | : This byte represents which pulse counter input had an integrity problem. When byte.BIT7 (MSB)=1 -> Pulse Counter input 15 had an integrity problem (Byte.BIT7=0 -> value is ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 8 had an integrity problem (Byte.BIT0=0 -> value is ok) | ||
| + | |||
| + | {| class="wikitable sortable" border="1" | ||
| + | | align="center" style="background:#f0f0f0;"|'''Page''' | ||
| + | | align="center" style="background:#f0f0f0;"|'''Byte''' | ||
| + | |- | ||
| + | | 0||81 | ||
| + | |} | ||
| + | |||
| + | : This byte represents which pulse counter input had correct data loaded. When byte.BIT7 (MSB)=1 -> Pulse Counter input 7 had a correct pulse counter loaded (Byte.BIT7=0 -> value is not ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 0 had a correct pulse counter loaded (Byte.BIT0=0 -> value is not ok) | ||
| + | |||
| + | {| class="wikitable sortable" border="1" | ||
| + | | align="center" style="background:#f0f0f0;"|'''Page''' | ||
| + | | align="center" style="background:#f0f0f0;"|'''Byte''' | ||
| + | |- | ||
| + | | 0||82 | ||
| + | |} | ||
| + | |||
| + | : This byte represents which pulse counter input had correct data loaded. When byte.BIT7 (MSB)=1 -> Pulse Counter input 15 had a correct pulse counter loaded (Byte.BIT7=0 -> value is not ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 8 had a correct pulse counter loaded (Byte.BIT0=0 -> value is not ok) | ||
== Data output modules (Page 1-10) == | == Data output modules (Page 1-10) == | ||
Revision as of 06:35, 22 September 2020
Contents
Introduction
The AIO has an onboard FRAM connected via I2C to the DSPIC33E (The Master). FRAM is used to keep track of the real-time change, Eeprom is used to store the settings. This document describes the FRAM memory locations used.
General Configuration Bytes (Page 0)
- Page 0 -> General data
| Page | Byte |
| 0 | 64 |
- This byte represents the hour (time) of the last system startup.
| Page | Byte |
| 0 | 65 |
- This byte represents the minute (time) of the last system startup.
| Page | Byte |
| 0 | 66 |
- This byte represents the second (time) of the last system startup.
| Page | Byte |
| 0 | 67 |
- This byte represents the day (date) of the last system startup.
| Page | Byte |
| 0 | 68 |
- This byte represents the month (date) of the last system startup.
| Page | Byte |
| 0 | 69 |
- This byte represents the year (date) of the last system startup.
| Page | Byte |
| 0 | 70-72 |
- These 3 bytes represents the number of hours this system is ON. Byte 70 is the MSB (Most Significant Byte), Byte 72 is the LSB (Least Significant Byte).
| Page | Byte |
| 0 | 73 |
- This byte represents the hour (time) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 74 |
- This byte represents the minute (time) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 75 |
- This byte represents the second (time) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 76 |
- This byte represents the day (date) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 77 |
- This byte represents the month (date) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 78 |
- This byte represents the year (date) of the last system startup with integrity problems of the pulse counters. If never an integrity problem happened, this value will be 0.
| Page | Byte |
| 0 | 79 |
- This byte represents which pulse counter input had an integrity problem. When byte.BIT7 (MSB)=1 -> Pulse Counter input 7 had an integrity problem (Byte.BIT7=0 -> value is ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 0 had an integrity problem (Byte.BIT0=0 -> value is ok)
| Page | Byte |
| 0 | 80 |
- This byte represents which pulse counter input had an integrity problem. When byte.BIT7 (MSB)=1 -> Pulse Counter input 15 had an integrity problem (Byte.BIT7=0 -> value is ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 8 had an integrity problem (Byte.BIT0=0 -> value is ok)
| Page | Byte |
| 0 | 81 |
- This byte represents which pulse counter input had correct data loaded. When byte.BIT7 (MSB)=1 -> Pulse Counter input 7 had a correct pulse counter loaded (Byte.BIT7=0 -> value is not ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 0 had a correct pulse counter loaded (Byte.BIT0=0 -> value is not ok)
| Page | Byte |
| 0 | 82 |
- This byte represents which pulse counter input had correct data loaded. When byte.BIT7 (MSB)=1 -> Pulse Counter input 15 had a correct pulse counter loaded (Byte.BIT7=0 -> value is not ok), when byte.BIT0 (LSB)=1 -> Pulse Counter input 8 had a correct pulse counter loaded (Byte.BIT0=0 -> value is not ok)
Data output modules (Page 1-10)
- Page 1 – 10 -> Contains data of the output modules, 32 bytes per module, 8 modules per page, 10 pages (80 modules maximum, 640 outputs -> 0-639)
| Page | Byte |
| 1 | x |
- This page is entirely used for output module 0-7:
- * Module 0: Byte0..31
- * Module 1: Byte32..63
- * ...
| Page | Byte |
| 2 | x |
- This page is entirely used for output module 8-15:
- * Module 8: Byte0..31
- * Module 9: Byte32..63
- * ...
| Page | Byte |
| 3 | x |
- This page is entirely used for output module 16-23:
- * Module 16: Byte0..31
- * Module 17: Byte32..63
- * ...
...
| Page | Byte |
| 10 | x |
- This page is entirely used for output module 72-79:
- * Module 72: Byte0..31
- * Module 73: Byte32..63
- * ...
Following Module structure is used:
| Page | Byte |
| 1-10 | x |
- Byte 0 (or 32 or 64 ...): Output state of this output (8 outputs, 1 bit per output, 0=OFF, 1=ON)
- Byte 1 (or 33 or 65 ...): Dimmer value of output 0 of the concerning module
- Byte 2 (or 34 or 66 ...): Dimmer value of output 1 of the concerning module
- Byte 3 (or 35 or 67 ...): Dimmer value of output 2 of the concerning module
- Byte 4 (or 36 or 68 ...): Dimmer value of output 3 of the concerning module
- Byte 5 (or 37 or 69 ...): Dimmer value of output 4 of the concerning module
- Byte 6 (or 38 or 70 ...): Dimmer value of output 5 of the concerning module
- Byte 7 (or 39 or 71 ...): Dimmer value of output 6 of the concerning module
- Byte 8 (or 40 or 72 ...): Dimmer value of output 7 of the concerning module
- Byte 9 (or 41 or 73 ...): Output Unlock -> Represents the 8 bits for the 8 Outputs, BIT7 (MSB) -> Output 7 of this module, ..., BIT0 (LSB) -> Output 0 of this module. BITx=0 -> Output is unlocked, BITx=1 -> Output is locked.
Data shutter modules (Page 11-19)
- Page 11-19 -> Contains the real live (not configuration) data of a shutter and Shutter Group
| Page | Byte |
| 11-18 | 0-255 |
- Page 11 Byte 0-7: Information regarding Shutter 0
- Page 11 Byte 8-15: Information regarding Shutter 1
- Page 11 Byte 16-23: Information regarding Shutter 2
- ...
- Page 18 Byte 248-255: Information regarding Shutter 255
Every Roller/Shutter has 8 bytes:
- 1st byte: Shutter status
- BIT0: =1-> direction UP, =0-> direction DOWN
- BIT1: =1-> shutter is locked, =0-> shutter is unlocked
- 2nd: Current shutter position (MSB)
- 3rd: Current shutter position (LSB)
- 4th: Open
- 5th: Open
- 6th: Open
- 7th: Open
- 8th: Open
- 1st byte: Shutter status
| Page | Byte |
| 19 | 0-255 |
- Page 19 Byte 0-7: Information regarding Shutter Group 0
- Page 19 Byte 8-15: Information regarding Shutter Group 1
- Page 19 Byte 16-23: Information regarding Shutter Group 2
- ...
- Page 19 Byte 248-255: Information regarding Shutter Group 31
Every Shutter Group has 8 bytes:
- 1st byte: Shutter Group status
- BIT0: =1-> direction group UP, =0-> direction DOWN
- BIT1: =1-> shutter group is locked, =0-> shutter group is unlocked
- 2nd: Current shutter group position (MSB)
- 3rd: Current shutter group position (LSB)
- 4th: Open
- 5th: Open
- 6th: Open
- 7th: Open
- 8th: Open
- 1st byte: Shutter Group status
Timer data (Page 20-29)
- Page 20-29 -> Contains the timer data of each timer output
| Page | Byte |
| 20-29 | 0-255 |
- Page 20 Byte 0-3: Information regarding Output 0
- Page 20 Byte 4-7: Information regarding Output 1
- Page 20 Byte 8-11: Information regarding Output 2
- ...
- Page 29 Byte 252-255: Information regarding Output 639
Every Output has 4 bytes:
- 1st: Timer Type:
- 0-> No Timer
- 1-> 100ms Time
- 2-> 1s timer
- 3-> 1m (minute) timer
- 2nd: Timer value MSB (Most Significant Byte)
- 3rd: Timer value LSB (Least Significant Byte)
- 4th: Not in use yet
- 1st: Timer Type:
Input data (Page 30-49)
- Page 30-49 -> Contains the dynamic data for the input modules
| Page | Byte |
| 30-49 | 0-255 |
Every page represents 4 input modules. Each input module has 64 byte in FRAM to store dynamic data like pulse counter information and others.
- Page 20 Byte 0-63: Information regarding Input Module 0
- Page 20 Byte 64-127: Information regarding Input Module 2
- Page 20 Byte 128-191: Information regarding Input Module 3
- ...
- Page 21 Byte 0-63: Information regarding Input Module 5
- ...
Input UNLOCK
Every Input can be locked or unlocked. 1 Byte in Eeprom per module is used to keep the state if an Input is locked or unlocked. Every bit of that byte represents 1 Input (MSB -> Highest Input, LSB -> Lowest Input). When BITx=1 then the Input is locked, when BITx=0 the Input is unlocked. When an Input is locked, the Input state will not change anymore until the Input is unlocked.
| Page | Byte |
| 30-49 | 0,64,128,192 |
- Byte 0 (and 64,128,192): Represents the 8 bits for the 8 Inputs, BIT7 (MSB) -> Input 7 of this module, ..., BIT0 (LSB) -> Input 0 of this module. BITx=0 -> Input is unlocked, BITx=1 -> Input is locked.
Pulse Counter information (Page 50)
- Page 50 -> Contains the Pulse Counter information of the Inputs embedded on the Core/Core+
Pulse Counters of the internal inputs of the Core/Core+ are stored in FRAM memory. This information is stored twice (Bank 1 and 2) to avoid corruption when writing during a power failure. Each Pulse Counter consist of 4 bytes (the pulse counter) and 2 bytes (CRC16 calculated over the 4 bytes).
| Page | Byte |
| 50 | 0-255 |
- Page 50 Byte 0-63: Pulse Counter information of the first 8 internal inputs - Bank 1
- Page 50 Byte 64-127: Pulse Counter information of the first 8 internal inputs - Bank 2
- Page 50 Byte 128-191: Pulse Counter information of the second 8 internal inputs - Bank 1 (Future use)
- Page 50 Byte 192-255: Pulse Counter information of the second 8 internal inputs - Bank 2 (Future use)
| Page | Byte |
| 50 | 0-63 |
- Input 0-7 Bank 1 (48 bytes used - 16 bytes free)
- Byte 0: Pulse counter Input 0 Byte 3 (MSB)
- Byte 1: Pulse counter Input 0 Byte 2
- Byte 2: Pulse counter Input 0 Byte 1
- Byte 3: Pulse counter Input 0 Byte 0 (LSB)
- Byte 4: CRC16 Input 0 Byte 1 (MSB)
- Byte 5: CRC16 Input 0 Byte 0 (LSB)
- Byte 6: Pulse counter Input 1 Byte 3 (MSB)
- Byte 7: Pulse counter Input 1 Byte 2
- Byte 8: Pulse counter Input 1 Byte 1
- Byte 9: Pulse counter Input 1 Byte 0 (LSB)
- Byte 10: CRC16 Input 1 Byte 1 (MSB)
- Byte 11: CRC16 Input 1 Byte 0 (LSB)
- ...
| Page | Byte |
| 50 | 64-127 |
- Input 0-7 Bank 2 (48 bytes used - 16 bytes free)
- Byte 64: Pulse counter Input 0 Byte 3 (MSB)
- Byte 65: Pulse counter Input 0 Byte 2
- Byte 66: Pulse counter Input 0 Byte 1
- Byte 67: Pulse counter Input 0 Byte 0 (LSB)
- Byte 68: CRC16 Input 0 Byte 1 (MSB)
- Byte 69: CRC16 Input 0 Byte 0 (LSB)
- Byte 70: Pulse counter Input 1 Byte 3 (MSB)
- Byte 71: Pulse counter Input 1 Byte 2
- Byte 72: Pulse counter Input 1 Byte 1
- Byte 73: Pulse counter Input 1 Byte 0 (LSB)
- Byte 74: CRC16 Input 1 Byte 1 (MSB)
- Byte 75: CRC16 Input 1 Byte 0 (LSB)
- ...
| Page | Byte |
| 50 | 128-191 |
- Input 8-15 Bank 1 (48 bytes used - 16 bytes free)
- Byte 128: Pulse counter Input 8 Byte 3 (MSB)
- Byte 129: Pulse counter Input 8 Byte 2
- Byte 130: Pulse counter Input 8 Byte 1
- Byte 131: Pulse counter Input 8 Byte 0 (LSB)
- Byte 132: CRC16 Input 8 Byte 1 (MSB)
- Byte 133: CRC16 Input 8 Byte 0 (LSB)
- Byte 134: Pulse counter Input 9 Byte 3 (MSB)
- Byte 135: Pulse counter Input 9 Byte 2
- Byte 136: Pulse counter Input 9 Byte 1
- Byte 137: Pulse counter Input 9 Byte 0 (LSB)
- Byte 138: CRC16 Input 9 Byte 1 (MSB)
- Byte 139: CRC16 Input 9 Byte 0 (LSB)
- ...
| Page | Byte |
| 50 | 192-255 |
- Input 8-15 Bank 2 (48 bytes used - 16 bytes free)
- Byte 192: Pulse counter Input 8 Byte 3 (MSB)
- Byte 193: Pulse counter Input 8 Byte 2
- Byte 194: Pulse counter Input 8 Byte 1
- Byte 195: Pulse counter Input 8 Byte 0 (LSB)
- Byte 196: CRC16 Input 8 Byte 1 (MSB)
- Byte 197: CRC16 Input 8 Byte 0 (LSB)
- Byte 198: Pulse counter Input 9 Byte 3 (MSB)
- Byte 199: Pulse counter Input 9 Byte 2
- Byte 200: Pulse counter Input 9 Byte 1
- Byte 201: Pulse counter Input 9 Byte 0 (LSB)
- Byte 202: CRC16 Input 9 Byte 1 (MSB)
- Byte 203: CRC16 Input 9 Byte 0 (LSB)
- ...
